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  ? semiconductor components industries, llc, 2011 may, 2011 ? rev. 12 1 publication order number: mc74hc74a/d mc74hc74a dual d flip-flop with set and reset high ? performance silicon ? gate cmos the mc74hc74a is identical in pinout to the ls74. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. this device consists of two d flip ? flops with individual set, reset, and clock inputs. information at a d ? input is transferred to the corresponding q output on the next positive going edge of the clock input. both q and q outputs are available from each flip ? flop. the set and reset inputs are asynchronous. features ? output drive capability: 10 lsttl loads ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0  a ? high noise immunity characteristic of cmos devices ? in compliance with the jedec standard no. 7.0 a requirements ? chip complexity: 128 fets or 32 equivalent gates ? these devices are pb ? free, halogen free and are rohs compliant http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information marking diagrams a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g or  = pb ? free package tssop ? 14 dt suffix case 948g 14 1 soeiaj ? 14 f suffix case 965 soic ? 14 d suffix case 751a 14 1 1 14 74hc74a alywg hc74ag awlyww 14 1 1 14 hc 74a alyw   1 14 14 1 pdip ? 14 n suffix case 646 mc74hc74an awlyywwg 1 14 (note: microdot may be in either location)
mc74hc74a http://onsemi.com 2 reset 1 data 1 clock 1 set 1 reset 2 data 2 clock 2 set 2 1 2 3 4 13 12 11 10 5 6 9 8 q1 q1 q2 q2 pin 14 = v cc pin 7 = gnd function table inputs outputs set reset clock data q q lh xx hl hl xx lh l l x x h* h* hh h hl hh l lh h h l x no change h h h x no change h h x no change *both outputs will remain high as long as set and reset are low, but the output states are unpredictable if set and reset go high simultaneously. logic diagram pin assignment set 1 clock 1 data 1 reset 1 11 12 13 14 8 9 10 5 4 3 2 1 7 6 set 2 clock 2 data 2 reset 2 v cc q2 q2 gnd q1 q1 ??????????????????????? maximum ratings ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ?????????????? ????? 25 ??? ???? ???? ?????????????? ?????????????? ????? ????? 50 ??? ??? ???? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????????????? ????? ????? ????? ????? ??? ??? ??? ??? ???? ?????????????? ????? ???  c ???? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????????????? ????? ????? ????? ????? ??? ??? ??? ???  c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recom mended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. ?derating ? plastic dip: ? 10 mw/  c from 65  to 125  c soic package: ? 7 mw/  c from 65  to 125  c tssop package: ? 6.1 mw/  c from 65  to 125  c recommended operating conditions ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? v cc ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ???  c ???? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd  (v in or v out )  v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74hc74a http://onsemi.com 3 dc electrical characteristics (voltages referenced to gnd) ???? ???? ???? symbol ????????? ????????? ????????? ????????? ????????? ????????? ???? ???? ???? ????????? ????????? ??? ??? ??? ???? ????  c ??? ???  85  c ???? ????  125  c ???? ???? ???? ???? v ih ????????? ????????? ????????? ????????? ? level input voltage ????????? ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ? level input voltage ????????? ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????? ? level output voltage ????????? ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ????????? ????????? ?????????  2.4 ma |i out |  4.0 ma |i out |  5.2 ma ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????? ? level output voltage ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? ??? ??? ??? ????????? ????????? ????????? ?????????  2.4 ma |i out |  4.0 ma |i out |  5.2 ma ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ???? ????????? ????????? ???? ???? 0.1 ??? 1.0 ???? 1.0 ???  a ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ?????????  a ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ???  a ac electrical characteristics (c l = 50 pf, input t r = t f = 6.0 ns) ???? ???? ???? ???? symbol ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ????????? ????????? ??? ??? ??? ??? ???? ???? ????  c ??? ??? ???  85  c ???? ???? ????  125  c ???? ???? ???? ???? f max ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ????????????????? ????????????????? ???? ???? ???? ???? ??? ??? ???? ???? ??? ??? ? flop)* typical @ 25 c, v cc = 5.0 v pf 32 * used to determine the no ? load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc .
mc74hc74a http://onsemi.com 4 timing requirements (input t r = t f = 6.0 ns) ???? ???? ???? ???? symbol ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ????????? ????????? ??? ??? ??? ??? ???? ???? ????  c ??? ??? ???  85  c ???? ???? ????  125  c ???? ???? ???? ???? t su ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ordering information device package shipping ? mc74hc74ang pdip ? 14 (pb ? free) 25 units / rail MC74HC74ADG soic ? 14 (pb ? free) 55 units / rail mc74hc74adr2g soic ? 14 (pb ? free) 2500 / tape & reel mc74hc74adtr2g tssop ? 14* 2500 / tape & reel mc74hc74afg soeiaj ? 14 (pb ? free) 50 units / rail mc74hc74afelg soeiaj ? 14 (pb ? free) 2000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free.
mc74hc74a http://onsemi.com 5 switching waveforms figure 1. 50% 50% 50% 50% v cc v cc gnd gnd set or reset q or q q or q clock t plh t phl 50% data clock v cc v cc gnd figure 2. valid gnd t su t h t rec t w set data reset 4, 10 2, 12 1, 13 clock 3, 11 5, 9 6, 8 q q *includes all probe and jig capacitance c l * test point device under test output figure 3. 1/f max clock q or q t f t r v cc gnd 90% 50% 10% 90% 50% 10% t plh t phl t tlh t thl t w 50% figure 4. figure 5. expanded logic diagram
mc74hc74a http://onsemi.com 6 package dimensions pdip ? 14 n suffix case 646 ? 06 issue p 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ? t ? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc74hc74a http://onsemi.com 7 package dimensions soic ? 14 d suffix case 751a ? 03 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m  dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019  7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint 7x
mc74hc74a http://onsemi.com 8 package dimensions tssop ? 14 dt suffix case 948g ? 01 issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? .  s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint
mc74hc74a http://onsemi.com 9 package dimensions soeiaj ? 14 f suffix case 965 ? 01 issue b h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.004 0.008 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e  10  0  10  l e q 1  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74hc74a/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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